グラフェン・オン・シリコン・ハイブリッドトランジスタの持続可能性と環境性能：グリーン製造、低炭素応用、循環型E-waste削減
Sustainability & Environmental Performance of Graphene-on-Silicon Hybrid Transistors: Green Fabrication, Low-Carbon Application and Circular E-Waste Mitigation (原題)
Kai Yap Guo
🤖 gxceed AI 要約
日本語
グラフェン・シリコン混成FET（GoSFET）について、材料合成から製造・運用・廃棄までの全ライフサイクル持続可能性を体系的に評価したレビュー的研究。再生炭素原料や生分解性ゲート絶縁膜などの低炭素・低毒性製造技術、低消費電力動作、ナノカーボン汚染防止、閉ループリサイクル工程を整理し、cradle-to-gate LCAデータに基づき量産化のボトルネックと改善策を示す。半導体産業の脱炭素とE-waste削減に資する技術的指針を提供する。
English
This paper systematically assesses the full-life-cycle sustainability of graphene-on-silicon hybrid FETs (GoSFETs), covering material synthesis, fabrication, operation, and end-of-life disposal. It reviews low-carbon, low-toxicity manufacturing routes (recycled carbon feedstock, biodegradable biopolymer gate dielectrics), low-power operation, nano-carbon pollution control, and a closed-loop recycling workflow, using cradle-to-gate LCA data to identify mass-production bottlenecks and optimization paths. It offers technical guidance for low-carbon, recyclable green semiconductor devices.
Unofficial AI-generated summary based on the public title and abstract. Not an official translation.
📝 gxceed 編集解説 — Why this matters
日本のGX文脈において
日本は半導体製造装置・材料で世界シェアを持ち、TSMC熊本進出やラピダスなど国家戦略として半導体産業のGX（電力・化学物質・廃棄物）が重要課題。本稿のLCA・リサイクル枠組みは、国内半導体サプライチェーンのScope3算定や有報・統合報告での環境負荷開示、循環経済規制対応に示唆を与える。
In the global GX context
Global semiconductor decarbonization is increasingly tied to Scope 3 accounting, CSRD/ISSB disclosure, and circular-economy mandates (e.g., EU Ecodesign, e-waste rules). This paper's cradle-to-gate LCA and closed-loop recycling framework for graphene-silicon devices adds to the emerging literature on low-carbon electronics manufacturing and supply-chain emissions, relevant to chipmakers and their customers' disclosure obligations.
👥 読者別の含意
🔬研究者:半導体デバイスの全ライフサイクルLCAとグリーン製造技術を統合的に整理した枠組みとして、材料・プロセス研究の評価軸を提供する。
🏢実務担当者:半導体・電子機器企業の環境部門が、Scope3算定やE-waste削減、低炭素製造プロセス導入の検討に活用できる。
🏛政策担当者:半導体産業の脱炭素・循環経済政策（リサイクル義務、有害物質規制、LCA基準）設計の参考になる。
📄 Abstract（原文）
Conventional silicon-based semiconductor manufacturing relies on high-temperature thermal processes, toxic, corrosive chemical reagents, and significant wafer-cutting losses, generating enormous electronic waste and persistent carbon emissions throughout the entire industrial chain. Graphene-silicon hybrid field-effect transistors (GoSFETs) combine the mature processing compatibility of silicon wafers and ultra-high carrier mobility of single-layer graphene, achieving balanced electrical performance and environmental friendliness. Nevertheless, existing research mostly focuses on discrete device electrical characterization or on separate partial environmental tests, lacking a systematic full-life-cycle sustainability assessment that covers material synthesis, manufacturing, operation, and waste disposal. This paper firstly elaborates the heterostructure carrier transport mechanism of GoSFETs and introduces two classic interface wetting theories: the Wenzel model and the Cassie-Baxter model. Afterwards, the paper systematically sorts out low-carbon and low-toxic manufacturing technologies, including recycled carbon feedstock preparation and fully biodegradable biopolymer gate dielectric layers. The research further analyses the advantages of low-power operation in hybrid sensing devices and corresponding nano-carbon pollution prevention strategies. It constructs a complete closed-loop recycling workflow for end-of-life hybrid transistors. Supported by cradle-to-gate life cycle assessment (LCA) quantitative data, this study identifies core industrial bottlenecks that restrict large-scale mass production and proposes targeted optimization approaches. This research provides solid theoretical, process and industrial technical guidance for the future development of low-carbon, recyclable green graphene-silicon semiconductor devices.
🔗 Provenance — このレコードを発見したソース
- openalex https://doi.org/10.54254/2755-2721/2027.ad37296first seen 2026-09-30 04:56:55
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